Twine Presentations

Spring 2007
Friday, 2-3pm, Rekhi 316

February 2: Zhenlin Wang

*      Simultaneous multithreading: maximizing on-chip parallelism, Dean Tullsen, Susan Eggers, and Henry Levy, In 25 Years of the International Symposia on Computer Architecture (Selected Papers) (Barcelona, Spain, June 27 - July 02, 1998). G. S. Sohi, Ed. ISCA '98. ACM Press, New York, NY, 533-544. (First published in ISCA '95.)

February 16: Peng Zhou

*      The case for a single-chip multiprocessor, Kunle Olukotun, Basem Nayfeh, Lance Hammond, Ken Wilson, and Kunyung Chang, In Proceedings of the Seventh international Conference on Architectural Support For Programming Languages and Operating Systems (Cambridge, Massachusetts, United States, October 01 - 04, 1996). ASPLOS-VII. ACM Press, New York, NY, 2-11.

February 23: Roland Scott

*      Characterization of simultaneous multithreading (SMT) efficiency in POWER5 , H. M. Mathis, A. E. Mericas, J. D. McCalpin, R. J. Eickemeyer, and S. R. Kunkel, IBM Journal of Research and Development, 49(4/5), 2005.

March 2: Shuhan Ding

*      Exploring the design space for a shared-cache multiprocessor, Basem Nayfeh and Kunle Olukotun, in Proceedings of the 21st Annual International Symposium on Computer Architecture, 18-21 Apr 1994, 166-175.

March 9: Chunming Gao

*      Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors, Evan Speight, Hazim Shafi, Lixin Zhang, and Ram Rajamony in Proceedings of the 32nd Annual International Symposium on Computer Architecture Madison, Wisconsin USA June 4-8, 2005. SIGARCH Computer Architecture News 33, 2 (May. 2005), 346-356. DOI=http://dx.doi.org/10.1109/ISCA.2005.8.

March 23: Wei Wang

*      Shared Memory Consistency Models: A Tutorial, Sarita V. Adve. Kourosh Gharachorloo. Technical Report 95-7, Digital Western Research Laboratory, Palo Alto, CA.

March 30: Weiming Zhao

*      The Java Memory Model, J. Manson, W. Pugh, and S. V. Adve, in Proceedings of the Symposium on Principles of Programming Languages (PoPL), January 2005.

April 6: Mingsong Bi

*      Conditional Memory Ordering, Cristoph von Praun, Harold Cain, Jong-Deok Choi, and Kyung Dong Ryu, in Proceedings of the 33rd International Symposium on Computer Architecture, June 17-21, 2006. Published in SIGARCH Computer Architecture News 34, 2 (May. 2006).

April 13: Shiliang Liu

*      Speculative synchronization: applying thread-level speculation to explicitly parallel applications, Jose Martínez and Josep Torrellas, in Proceedings of the 10th international Conference on Architectural Support For Programming Languages and Operating Systems (San Jose, California, October 05 - 09, 2002). ASPLOS-X. ACM Press, New York, NY, 18-29.

April 20: Steve Carr

*      Threads Cannot be Implemented as a Library , Hans-J. Boehm, in Proceedings of the Conference on Programming Language Design and Implementation (PLDI), June 2005.

April 27: Soner Onder

*      LogTM: Log-based Transactional Memory K. E. Moore, J. Bobba, M. J. Moravan, M. D. Hill, and D. A. Wood, International Symposium on High Performance Computer Architecture (HPCA), February 2006.

Thanks to John Mellor-Crummey at Rice Univesity. This list is taken with permission from his reading list for COMP 522 Fall 2006.