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Project KIZILIRMAKReshaping the Future of Instruction Level Parallelism |
| Supported by : NSF CAREER award to Dr. Soner Onder National Science Foundation Computer Systems Architecture Program CCR-0347592 Start : 02/15/04 (5 years) |
The selection of the project name, namely the name of a major river in Turkey is about the research itself ; because this project is about flow;
and has something about the PI, something about his native country. (Disclaimer: NSF has nothing todo with the choice of the name). The selected project symbol is from a breath-taking architectural beauty, which is among UNESCO listing of world heritage sites.
Research :
This research aims at providing an effective solution to the fetch problem of instruction level parallel processors. With the concept of "future values", one can represent traditional programs in a new control-flow form such that on any control flow path the data-flow aspect of the computation is either traditional (i.e., definition of a value precedes its consumers), or reversed (i.e., consumers of a value precedes its definition). The representation hence allows ordering of instructions even when the data dependencies would prohibit doing so in a control-flow graph. As a result, it is possible to seamlessly exploit control independence, use predication to eliminate any branch instruction, and design processors, which can reuse the internally generated dataflow graph as another source of instructions.
This approach has the potential to significantly impact the design of processors and optimizing compilers, and positively affect every field of science and commerce that relies on processor performance. The project will also result in course materials and software tool sets that will be made publicly available. Finally, the project will contribute greatly to the development of the recently initiated Computer Science Ph.D. program at Michigan Technological University.
Tools :
There will be an upcoming public release of the Flexible Architecture Simulation Tool (FAST) system. Any educational or not-for-profit use
will be welcome. Check this page again.
People :
Two of my graduate students Peng Zhou and Vinay Belgaumkar are working on the project.
Publications :
J. Bastian and S. Onder. Specification of Intel IA-32 using an Architecture Description Language, In Workshop on Architecture Description Languages, WADL-04, pages 33-42, August, 2004, Toulouse, France.
S.Onder. An introduction to Flexible Architecture Simulation Tool (FAST) and Architecture Description Language ADL.
Technical Report TR 05-01, Department of Computer Science, Michigan Technological University.